The present invention relates to a semiconductor device and a manufacturing method thereof, specifically relates to an effective technology for applying a semiconductor device where a trench gate MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and a planar gate MOSFET are formed over the same semiconductor substrate.
For instance, in an electronic control unit for automobiles, a semiconductor device where a power MOSFET and a protection circuit (protection element) thereof are combined in one unit is applied for the purpose of making it smaller and highly reliable in a high temperature environment.
Japanese unexamined Patent Publication No. Show 63 (1988)-229758 (patent document 1) discloses a technology relating to a vertical type power MOS transistor having a self overheat protection function.
Japanese Patent No. 3414569 (Patent document 2) discloses a technology relating to a trench insulator gate (trench gate type) semiconductor element and horizontal type insulator gate (planar gate type) semiconductor element formed over the same chip.    [Patent document 1] Japanese Unexamined Patent Publication No. Show 63 (1988)-229758    [Patent document 2] Japanese Patent No. 3414569